 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MITSUBISHI (Dig./Ana. INTERFACE) M62230FP LCD MATRIX REGULATOR DESCRIPTION The M62230FP is a semiconductor circuit for LCD matrix regulator, which will generate the diveded-voltage to drive LCD matrix. By changing the connection of R pin(i.e.,Change the internal resistor ratio), M62230FP can support divided voltage ratio ranging from 1/5 bias to 1/13 bias. The high stability and any desired voltage levels is possible, since the variable voltage regulator for Vref is built-in. R6 1 R5 2 R4 3 R3 4 R2 5 R1 6 20 VREF 19 VIN5 18 VCC 17 VO5 16 VO4 15 VO3 14 VO2 13 VO1 12 GND 11 VIN PIN CONFIGURATION (TOP VIEW) FEATURES *Adjustable type voltage divider. (The setting range of internal resistor is from 1/5 bias to 1/13 bias) *5 resident buffer-Amp. (5 divided output) *Low power dissipation(1.8 mA Typ.) *Resident voltage-variable regulator for Vref. REGOUT 7 REGIN 8 VIN3 9 VIN2 10 Outline 20P2N-A APPLICATION To drive LCD. RECOMMEND OPERATING CONDITIONS (Ta=25C) Supply voltage range : GND-Vcc :(if V 1 > -1V, it is necessary to support V IN)........ -30 to -10V Recommend input voltage GND-VREF :VREF Vcc........ -30 to -6V (To set Vcc, VREF, in order that both I 0-V2 I & I VCC-V5 I are larger than 1V) BLOCK DIAGRAM REGOUT 7 R1 6 R2 5 R3 4 R4 3 REGIN 8 R -1.38V R R R 2 R R5 VIN3 9 4R 1 R6 VIN2 10 GND 12 R R R R R 19 VIN5 VIN 11 18 VCC 20 VREF 13 VO1 14 VO2 15 VO3 16 VO4 17 VO5 (1/ 4) MITSUBISHI (Dig./Ana. INTERFACE) M62230FP LCD MATRIX REGULATOR EXPLANATION OF TERMINALS Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol R6 R5 R4 R3 R2 R1 REGOUT REGIN VIN3 VIN2 VIN GND VO1 VO2 VO3 VO4 VO5 VCC VIN5 VREF Function If the voltage of each pin can satisfy the following condition: VO6 VO5 VO4 VO3 VO2 VO1 these pins will be used. Please refer to page. 4 to set the bias ratio. Regulator output for VREF to use The inverting input pin of REG OP-Amp VIN3 Input VIN2 Input if V1 > -1.0V, it is necessary to support VIN VIN Power if V1 < -1.0V, this pin connect to GND GND Pin Divided-voltage output pin To set VCC & VREF, in order that 0 - V2 1V To set VCC & VREF, in order that V5 - VCC 1V VCC Power (-Power) VIN5 input Reference voltage input pin ( 2/ 4) MITSUBISHI (Dig./Ana. INTERFACE) M62230FP LCD MATRIX REGULATOR ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted) Symbol VCC IOUT Pd K Topr Tstg Parameter Supply voltage Maximum output current Power dissipation Thermal derating Operating temperature Storage temperature Conditions Ratings -36 to 0 30 550 5.5 -20 to +75 -40 to +125 Unit V mA mW mW/C C C Ta=25C Ta>25C ELECTRICAL CHARACTERISTICS(Vcc=-16V, VIN=GND, VREF=-12V, Resistor setting=5R, Ta=25C, unless otherwise noted) Symbol VCC ICC RVO1 RVO2 RVO3 RVO4 RVO5 RVO6 RR1 RR2 RR3 RR4 RR5 RR6 R V1 V2-1 V3-1 V2-2 V3-2 V4 V5 VREG REG-L Parameter Supply voltage Dissipation current Output voltage ratio 1 Output voltage ratio 2 Output voltage ratio 3 Output voltage ratio 4 Output voltage ratio 5 Output voltage ratio 6 Resistor ratio 1 Resistor ratio 2 Resistor ratio 3 Resistor ratio 4 Resistor ratio 5 Resistor ratio 6 Resistance Load regulation of output voltage 1 Load regulation of output voltage 2-1 Load regulation of output voltage 3-1 Load regulation of output voltage 2-2 Load regulation of output voltage 3-2 Load regulation of output voltage 4 Load regulation of output voltage 5 Output voltage of regulator Load regulation of VREF Test conditions Min. -35 1.98 1.98 8.90 4.45 4.45 8.90 Limits Typ. 1.80 2.00 2.00 9.00 4.50 4.50 9.00 4 5 6 7 8 9 20 20 20 20 20 20 20 20 -1.31 50 k mV mV mV mV mV mV mV V mV Max. -10 2.02 2.02 9.10 4.55 4.55 9.10 Unit V mA VREF= -16V V2/V1 (V5-V3)/(V5-V4) V5/V1 V5/V2 V5/(V5-V3) V5/(V5-V4) Resistor between VIN3 and R1/ resistor between R1 and R2 Resistor between VIN3 and R2/ resistor between R1 and R2 Resistor between VIN3 and R3/ resistor between R1 and R2 Resistor between VIN3 and R4/ resistor between R1 and R2 Resistor between VIN3 and R5/ resistor between R1 and R2 Resistor between VIN3 and R6/ resistor between R1 and R2 Resistor between R1 and R2 +200A -1.38 ( 3/ 4) MITSUBISHI (Dig./Ana. INTERFACE) M62230FP LCD MATRIX REGULATOR THE SETTING METHOD OF DIVIDED-VOLTAGE R + - VO1 R + - VO2 RX + - VO3 R + - VO4 VO5 R + - RX R 2R 3R 4R 5R 6R 7R 8R 9R Bias ratio 1/5 1/6 1/7 1/8 1/9 1/10 1/11 1/12 1/13 Example of setting 9 pin- 6 pin short, 10 pin- 5 pin short 9 pin- 6 pin short, 10 pin- 4 pin short 9 pin- 6 pin short, 10 pin- 3 pin short 10 pin- 6 pin short 10 pin- 5 pin short 10 pin- 4 pin short 10 pin- 3 pin short 10 pin- 2 pin short 10 pin- 1 pin short R VREF (4/ 4) |
Price & Availability of M62230FP
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |